Ramsey Electronics FZ-146 Specifications Page 104

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FX 146 104
work together for channel programming.
The Phase Detector (or "phase corrector") which compares the 5
KHz Reference Frequency with the "intended" 5 KHz output of the
divide by N counter and sends correcting pulses to the VCO to
keep the output of the N divider right at 5 KHz.
A "lock detect signal" circuit.
An easy illustration of how simple assembly error causes an unlocked or
mistuned PLL can be seen in the fact that theReference Frequency "R"
counter is externally programmable by grounding various combinations of
pins 4,5,6, permitting 8 possible divider values.
Let's say that pin 6 of the IC or socket is bent and does not make contact.
This would cause the "R" divider to divide by 1160 rather than 2048, for a
Reference Frequency of 8.8276 KHz rather than 5 KHz! Thus, the VCO
output would become a multiple of 8.8276 KHz. If "N" is programmed as
29,304 for 146.52 MHz Simplex, the single bent IC pin would cause the
output frequency to be 29,304 X 8.8276 KHz, which is 258.684 MHz!
Because the VCO cannot tune this high, the loop becomes unlocked.
In addition to looking over the following block diagram of the internal circuits
of U6, it is worthwhile to study the block diagram and the schematic of the
whole FX- transceiver circuit. The more you work to understand it, the more
confident you'll become in using, maintaining, programming and customizing
your FM transceiver.
FX- TRANSCEIVER PLL OVERVIEW:
The reference oscillator is internal to U6, governed by Y2. The precision of
the 10.240 MHz reference oscillator can be adjusted by trimmer C81. The R
divider feeds 5 KHz to the phase detector section of U6 (10.240 divided by
2048).
The output of the 12017 ÷64/65 prescaler U3 is AC coupled via C57 to pin
1. IC U3 is a "dual-modulus" prescaler, controlled by pin 9 of U6. The pre-
scaled output of the VCO is fed to the A and N counters. The "N" number
programmed on the diode matrix is pre-determined to divide this frequency
down to 5 KHz for phase comparison with the 5 KHz output of the crystal
controlled reference divider.
The minimum "N" number is 1. The maximum can be stated in a variety of
ways, some more exact than others. We could just say "64K less 1" or 2 to
an n-th power less one. We could say the maximum is what you get when
you install diodes in all 16 positions of the parallel programming matrix. We
could express it as "2 x 32768 - 1" or just say that it is 65,535!
The details of N divider programming will be covered in the next section.
We'll even see that the roles of the offset matrix and the binary adders (U7-
U10) are clear, brief and simple to explain.
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